Introduction：
In the last issue, we talked about how to take out silicon ingots and monocrystalline silicon rods from a pile of silica silicon sand, and will soon start cutting them into wafers; at the same time, it was also mentioned that from this step onwards, the road to domestic production of chips will enter the first link to be necked. This point, many students will certainly have doubts, because go online to search for monocrystalline silicon production capacity, will find that China accounts for more than 90% of the world, which is not a great advantage? Here we have to distinguish between photovoltaic-grade monocrystalline silicon used in the manufacture of solar cells and modules and semiconductor-grade monocrystalline silicon used in the manufacture of chips. The biggest difference between the two, is the purity of silicon: photovoltaic grade monocrystalline silicon purity is 6 9, while semiconductor grade generally requires 10-11 9, a difference of several orders of magnitude. In addition, such as surface flatness, metal impurities and other indicators, semiconductor-grade monocrystalline silicon is also much more stringent, so although the two manufacturing processes are basically the same, but the difference in plant equipment and control precision is huge.
Photovoltaic and Semiconductor
At present, China’s production of monocrystalline silicon and silicon wafers, the vast majority of photovoltaic grade. From the industrial scale, the global market share of the photovoltaic industry, at a scale of about 100 billion U.S. dollars, the production and market increment in recent years are basically in China, so the production of photovoltaic-grade monocrystalline silicon we hang the world. But used to make chips of semiconductor-grade silicon wafers, the mainland enterprises’ production capacity ratio plummeted to less than 5%. Although the market size of semiconductor silicon wafers, only more than 10 billion U.S. dollars, it does not look like much meat, but do not forget that this is only the most upstream of the entire semiconductor industry chain. The further down the profits will grow exponentially, with silicon wafers, you can do chips; and chip market size, up to $ 400 billion, with chips, you can produce computers, cell phones and other types of electronic products. To this, is a trillion dollar level far beyond the photovoltaic industry, civilian and military market.
The entire semiconductor industry chain is interlocked, up, middle and downstream, like a three-layer cake, each layer is the next layer of the admission roll. Previously, the global semiconductor industry division of labor is clear, you can buy a ticket to eat the next layer of the big cake, but in the context of reverse globalization, if the degree of autonomy is not high, it is easy to be controlled by others. For example, now stuck in the midstream chip supply, you will not be able to build cell phones, and later if the supply of silicon wafers stuck upstream, it will even wafer and chip production are a problem. Here there must be partners to ask: silicon wafers, wafers and chips is what relationship? Simply put, it is the “grandchildren relationship”. Silicon wafer is a bare wafer, to go through lithography, epitaxy, etching and a series of operations, into a mature wafer containing hundreds of chips, and then after cutting, packaging, into a separate chip. To use a simple analogy, silicon wafers are like pancakes, wafers are high-grade pancakes with eggs and ham, and chips are high quality pancakes that allow the boss to cut off a piece and put it in a box for you.
Silicon Wafer Manufacturing 1-6
How do silicon wafers come from? There are at least 10 steps in this process: first of all, the silicon rods will be pulled out by cutting off the silicon head and tail, and of course, if the quality is good, the cut part can also be cut into seed crystals, which can be used to pull new silicon rods to achieve unlimited silicon rod production; next, the resistivity of the rod body will be measured by the four-probe method, which is used to check whether the concentration of impurities in the axial direction is abnormal. The next step is to measure the resistivity of the rod body using the four-probe method, which is used to check whether the concentration of impurities in the axial direction is abnormal.
Then it goes to the next process – tumbling and grinding. As the name suggests, the silicon section is fixed on the machine and allowed to roll slowly, and the bar body is polished with a diamond wheel on the side, called a gold wheel for short. Since the direct pulling method cannot precisely control the crystal growth and obtain a perfect cylinder, a thicker silicon bar has to be pulled out first and then rolled and ground to get the desired target size. The intense friction between the silicon segment and the gold wheel will generate a lot of heat, which needs to be cooled down by adding water continuously, and after the tumbling is completed, a flat or a groove will be ground on the side of the silicon segment, which is the positioning edge (flat) or positioning groove (notch) on the wafer later. The lithography machine needs them for the initial positioning and alignment of the wafer, and in the industry, the positioning edge also serves a small purpose, which is to indicate the type and crystal orientation of the wafer. For those who are interested, please refer to Chapter 1 of Fundamentals of Materials Science.
The next step is to slice the silicon segment, which used to be commonly done using an internal circle cutter, which you can understand as a kind of dog-head guillotine with a ring-shaped blade. The advantages are stable cutting and flatter cutting surface, but the disadvantages are also obvious: low efficiency can only cut one piece at a time, and because the edge is thicker, more silicon is lost during cutting, and it is not suitable for handling relatively thinner and larger size silicon wafers. The current mainstream slicing method is the use of diamond wire multi-wire cutting machine, that is, with diamond particles fixed on top of the wire line, while the silicon segment for multi-segment cutting, this line cutting method, although not as stable as the traditional blade, the subsequent silicon wafer grinding time is also longer, but win in cutting high efficiency and low loss, may also be used to deal with the three-body beltway party in the future. Cut down the silicon wafer will first go through a mechanical grinding, so that the surface is more flat, while making the overall thinning. For example, a 12-inch wafer will be reduced to a thickness of about 775 microns by grinding the wafer. Certain silicon wafers also have to do back damage, which is considered to create a rough back, such as sandblasting or depositing a layer of polysilicon on the back, which is done deliberately to create a large number of crystal defects at the bottom as a trap to trap unwanted metal impurities in the subsequent process at the bottom layer, thus protecting the device on the top layer.
In the eyes of engineers there are no eternal advantages or disadvantages, only features that can be exploited. This is because high-purity silicon is a very brittle material, so this treatment can reduce the risk of chipping at the edges. In addition to this, the curved edges have two other roles in the subsequent chip manufacturing process. If the edge is right-angled, the photoresist will easily accumulate at the edge due to centrifugal force, resulting in uneven thickness, thus affecting the lithography; secondly, when doing epitaxial growth, the deposit will also preferentially accumulate at the right-angled edge to affect the deposition effect, while the rounded corner can eliminate the phenomenon of edge deposition (Edge Crown). Here if you do not understand does not matter, lithography and epitaxial growth is an important process of chip production, I will tell you again later.
Silicon Wafer Manufacturing 7-10
After grinding and guiding the wafer, the manufacturer will generally put a laser marking code on the wafer, and then perform a fine polishing to remove the thickness of about 10 microns, and then put it into a solvent for chemical etching, usually using hydrogen nitrate and hydrofluoric acid, to etch away the surface thickness of about 20-50 microns to remove the mechanical damage accumulated during the previous grinding process and the abrasives mixed into the surface of the wafer. By this time, after a series of grinding and etching, the silicon wafer surface is already smooth. But it is not smooth enough for chip manufacturing. You can compare it to watching a small movie at home with a projector with the lights off, if the curtain is not flat enough with undulating inclination or local bump, the projected image will be distorted and affect the viewing experience, while in lithography, the silicon wafer is equivalent to the curtain, and the image size and precision of lithography are nanometer level, so the silicon wafer surface is required to be A perfect plane. The slightest undulation or local bump will affect the lithography effect.
According to the international blueprint for semiconductor technology development in ’04, the overall flatness of a 12-inch silicon wafer should be less than 51 nanometers, which is equivalent to hanging an IMAX curtain in a movie theater with an undulation finer than a hair’s breadth. In order to achieve this extreme flatness, the silicon wafer needs to be chemically and mechanically polished, referred to as CMP (Chemical_Mechanical Polishing), this step is a combination of physical and chemically integrated polishing means, the specific approach is to mount the silicon wafer on a rotating polishing apparatus, down to the bottom, the surface thin layer will first be chemically oxidized by the abrasive solution, and then by the polishing pad physical Polishing, the thickness of the wafer in this step will then be played about 5 microns thin, until it is polished to a perfect mirror, usually 8-inch wafer polished on one side, 12-inch wafer polished on both sides, so that a polished wafer.
Finally, it also has to be cleaned with deionized water and various chemical solvents to remove various dust and impurities that adhere to the surface of the silicon wafer during the process. These particles can affect the manufacturing process of the chip and cause short circuits or open circuits in the device, and in addition to strict control of the contaminant density, the particle size often cannot exceed half of the characteristic size. So in the advanced process, can allow a single particle diameter of up to a few nanometers, this is much stricter than sterile surgery. It is important to know that a single flu virus can have a diameter of 100 nanometers, and bacteria is even larger. So many silicon wafer factory or wafer fab in the fight workers have to take leave when they get the flu, or sneeze, may contaminate the chip, which is one of the reasons why the epidemic on the chip capacity hit extra serious.
Cleaning of wafers, as well as etching and CMP mentioned above, are also important processes that need to be repeated afterwards to manufacture chips, which I will explain in detail later. In addition to flatness and cleanliness, the wafer must also be guaranteed to have warpage, interstitial Oxygen, metal residue, etc. After passing various tests such as electron microscopy and optical scattering, a flat wafer is finally born. It will be placed in a sealed box filled with nitrogen and sent to the wafer fab to start the next stage of the journey.
In addition to ordinary silicon wafers, there are many special types of wafers to meet the needs of wafer fabs with different process technologies or products, such as epitaxial wafers, annealing wafers, SOI wafers and many other kinds of wafers, here because of time, these variants of silicon wafers and other materials, such as the production process of silicon carbide, I will come out later to explain an extra chapter. In addition to the type, the size of the wafer also has a lot in, such as the 8-inch and 12-inch mentioned earlier, are the industry’s customary name, referring to the diameter of 200 and 300 mm wafers or wafers, theoretically, of course, the larger the diameter the better, so that the output of a single wafer more chips, and the wafer edge of the residual chip (edge die) accounted for less, to improve production yields and share the manufacturing costs But large silicon wafers in the process and equipment on the threshold is also higher, 8 inches is widely used in more than 90 nanometers of mature processes, your car sensors and power devices, most of the production from 8-inch wafers, 12-inch wafers are used in more advanced processes, your computer CPU, graphics cards, cell phone memory cards, basically produced from 12-inch wafers.
Market Status
Now the global silicon wafer supply is mainly monopolized by five companies, respectively, Japan’s Shin-Etsu Chemical and Shenggao Group, Taiwan’s Global Wafer, Germany’s Siltronic and SK Siltron, of which Japan is the first country to achieve mass production of large 12-inch wafers, and since then has maintained the first-mover advantage in silicon wafer technology, while Global Wafer is a company established only in 2011. Global Wafer is a company established in 2011, relying on the accumulated technology inherited from China and the United States, as well as the strong expansion of mergers and acquisitions in recent years, has quickly grown into the third silicon wafer market, and the second half of this year it will also acquire the fourth Siltronic, then the market share will exceed 30%, and Shin-Etsu Chemical to compete for the championship, I believe that after the complete reunification of the motherland, silicon wafer production technology shortcomings can be made up in a short time. But before that, my analysis is limited to the mainland semiconductor industry for the time being.
At present, the mainland’s semiconductor wafer manufacturers, in order to Central, Leon Micro and Shanghai Silicon Industry as the main force. Among them, Tianjin Zhonghuan based on photovoltaic monocrystalline silicon, in recent years began to actively layout the development and production of semiconductor-grade silicon wafers; Hangzhou Leon Micro is focused on semiconductors, and can do both silicon and silicon wafers, but also discrete devices chip, is one of the few domestic semiconductor companies can go through the industry upstream and downstream. Shanghai Silicon Industry Group and its subsidiary Shanghai Sunrise is currently the leader in domestic silicon wafer technology, in addition to having the independent technology of SOI wafers, in other domestic manufacturers can only produce 8-inch and below, they took the lead in 18 years to start large-scale production of 12-inch wafers, ending the history of the domestic large silicon wafers all rely on imports, but because of the huge cost investment, and the yield is not high, Shanghai Silicon Industry Large silicon wafers to this year has not been able to achieve profitability, which is the first difficulty of silicon wafer localization: the cost.
Domestic constraints
I said at the beginning, semiconductor silicon and silicon wafers belong to the upstream market, the scale is not large profits are not high, but huge investment, high costs, need a lot of financial support; the second difficulty, after I finished the production process of silicon wafers, you should have guessed, that is, the equipment. To the most source of monocrystalline furnace, for example, the major silicon oligarchs have their own exclusive suppliers, the letter of the chemical can even manufacture their own monocrystalline furnace, so that outsiders can not buy the same model, and the subsequent production process, the domestic wafer manufacturers are basically using imported equipment, such as chamfering machine, mainly from Japan’s Tokyo Precision and Grand Way Electronics; multi-line cutting machine mainly from Japan’s NTC and Switzerland’s SlicingTech. SlicingTech. Although these devices can find domestic alternatives, but the quality and accuracy of the gap is often large, especially the key steps of the CMP, materials such as polishing pads and lapping solution can still be domestic, but the equipment itself is currently completely dependent on imports.
The third difficulty lies in the wafer fab’s dependence on the path of silicon oligarchs, from bare silicon wafers, into wafers containing hundreds of chips, which often go through dozens of equipment, thousands of processes, the cost is huge; so from the source of the process validation stage, the wafer fab should work closely with silicon suppliers, and a process is mature, the wafer fab will not rashly replace other suppliers of silicon, otherwise production yields and chip reliability, once affected, the cost and price is too big.
I have done many times in the factory flow, the front-end production of the chip is sometimes really arcane, moving a tiny variable, it may have a great impact on the yield, not to mention the most source of silicon wafers. So in recent years, even if the silicon chip makers frequently increase prices, Fab (wafer fab) still have to continue to buy their products. This also leads to new players want to enter the certification, extremely difficult, so we develop chip localization, but also to encourage the upstream silicon wafer factory and wafer fab dream linkage, increase the (domestic) silicon wafer utilization rate and trial and error opportunities, and in addition to the above three difficulties, there are R & D investment and talent training, here I will not say more, in the final analysis, all have to spend money.
Summary
OK above, we got the silicon wafer from the silicon rod, that is, the original state of the wafer, the next issue, I will gradually explain the clean room (clean room) and lithography, I know this issue, some partners may be a little discouraged, this is not yet lithography, how to hit the bottleneck, do not worry, more difficult is still ahead, first rational understanding of which links there are gaps, in order to better catch up, we The silicon wafer business started late, in terms of hardware and technology, there are many shortcomings need to fill, the treatment of employees also needs to be strengthened. The good news is that in the last two years, the degree of silicon wafer localization has been improving, the key CMP equipment, domestic teams are also actively developing, please give them a little more time, a little more salary, not to mention the semiconductor industry, has always been a global division of labor, mutual cooperation, there has never been a country, with their own strength, to carry the whole industry chain, to enhance the degree of autonomy, it is not a nightly effort. Silicon chip is only the first hurdle of the long road, and the road of domestic chips, will be obstructed and long, the only way to know the difficulties, in order to step on the bumpy road into the avenue, the only foot on the ground, the only way to strike the hardships and set out.
