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Hundreds of millions of transistors in a chip, and not a single bad one?


Q:There are hundreds of millions of transistors in a chip, so even with the best technology, it is impossible for all of them to be problem-free, right? If one or two of them break, will the chip still work? How can we ensure that the overall functionality is not affected?

A: Regarding the production, testing and reliability of the chip, it is impossible to have hundreds of chips and hundreds of millions of transistors on a single wafer without a single bad one, because there are various defects (defects) in production that cannot be avoided, such as lithography, deposition and other sensitive processes, not to mention even the final scribing, i.e. cutting the chip off the wafer, which can lead to cracks or metal splashes and cause damage to the device. device damage, so a silicon wafer actual output of how many available chips, is an important indicator of the industry, is what we most often say yield, usually the newer a process, the more process steps, the worse the yield, the proportion of scrap chips and the probability of problems with transistors on the chip is higher, like Samsung 5nm process just came out, the yield rate is far below 50%, that more than half of the mobile phone chips, do So the chip factory recruited so many process, equipment and yield engineers, is studying how to get the yield up, the cost can come down, TSMC’s 5nm at the beginning, the yield rate is only 30%, now it is said to have 80% +,

So if you measure the process from the production point of view, that 90nm, 180nm, 130nm such mature process The device structure is simple, there are not many steps, and the yield exceeds 98% and 99% very easily, but as far as a chip is concerned, how can we ensure that the failed transistors do not affect its function and use? This could actually be the subject of a separate video, so here is a brief overview. First of all, not every bad transistor will affect the function of the system, the logic circuit is indeed more sensitive, but want to cache such a storage unit is a certain amount of redundancy, a small amount of damage can take a spare tire to replace, there are some transistors, such as for DFT (Design for Test), purely for the test is born, the actual use of the actual no longer need them, bad, bad, bad. And smart manufacturers will also sell you chips in levels, for example, 8-core CPU, if some key transistors hang, resulting in a core can not be used, then it will be banned directly, 8-core as 6 cores sold, i7 into i5, change the label to solve, in addition to the chip on the device failure, not necessarily production to take the blame, may be design, verification problems, testing, quality control is not in place, so the chip into the Before fab mass production,

We have to go through countless rounds of verification, if there is money, we will also do several pre-flow, and then to post-silicon, that is, into the chip factory production, including packaging before and after, there are many rounds of testing and screening, until through the final test (Final Test), sold to the hands of customers, there are problems have long been removed, like a very high reliability of automotive or military chips, in the This is not to prevent production problems, but in the operation of the chip, the violent death of one or two tubes is also very likely, depending on the device materials and use of the environment, after all, the chip also has a life will age, but it is not like the human body, can self-repair, some aerospace grade chips do have this aspect of research. For example, after the chip is built, we find that some characteristics and specs are not right, so we can try to fine-tune it by trimming, trimming is not cutting the grass for the fish tank, simply put, we have designed a few spares for the chip beforehand. A few spare tire, such as get a few fuses and film resistors, when necessary to fuse, or laser hit, to adjust some parameters on the chip, if even this can not save, then redesign and re-flow shell, the loss of a few million, for the chip company is very normal, the most valuable process experience in large factories is to burn out with money, like we do not reimburse a few batches of mask (photomask), are Sorry to say they are senior engineers.

Q: How can non-contact lithography solve the diffraction problem?

A: As long as the diffraction limit of optical lithography is a physical phenomenon of light, there is no way to solve it, only to find ways to improve, unless you completely change the technical route, such as nano-imprinting, but the current mainstream lithography technology to carve smaller chips, either to reduce the wavelength of the light source, the ultraviolet light source to deep ultraviolet (DUV), extreme ultraviolet (EUV) X-ray, or to use some engineering The technique of multiple exposures, which divides a mask into several parts, the technique of water submersion, which calls for ultra-pure water to change the equivalent wavelength of the light source, and the technique of side wall transfer, which uses photoresist and deposition to create walls, etc. Of course, these advanced process tricks will be handed over to you later.

Q:I am preparing to enter the semiconductor industry this summer, is there any development for PE in fab factories? Is it a youthful job?

A:Of course there is development for process engineers, but it depends on the importance of the position, the technical strength of the company and your personal career plan. If you are in the core R & D post then you can learn a lot of things, especially like advanced process lithography, dry lithography (dry etching) these, the work is really very tired, but to be able to become the technical experts of this module, the future is still very popular, in addition, if you do not want to take the technical route, you can also take advantage of the time in fab, more accumulation of experience on the whole production line, this is not learned outside, after you can also come out to do Management ah, planning and so on, anyway, I know there are big factory CEO, is PE origin, I do not know so pie, you are not satisfied? If your career planning is only to use PE as a springboard, want to later transfer the device, test these from the design side more into the position, it is best not to go to the pure foundry fab, go to IDM will be better, because they design all the way to production, you will be able to contact more colleagues in other positions and more front-end work content, as for the youth rice, I think not, the process itself is the experience of The probability of senior PEs being replaced by young people is very small, and now not only are young people reluctant to enter the factory, chip factories are also reluctant to enter people, after all, people are a walking source of pollution for the process, so the general trend of the future fab is to replace manual labour with automation, operators may be replaced by robots, but PEs in R&D will not yet, because robots cannot write The operators may be replaced by robots, but the PEs in R&D won’t yet because the robots can’t write recipes and 8D reports.

Q: I’ve just landed a Master’s degree in IC this year, and my supervisor’s direction is to do analogue RF IC design.

A: RF IC can be classified by application, such as consumer electronics, mobile phone routers, or like car navigation, millimeter wave radar, and aerospace communications and many other industries are in demand, if classified according to the responsibilities of RF engineers, there are R & D, testing, applications and system architecture, etc. As for the specific employment situation and development prospects, we will leave it to the next issue, because it is true that many people do not yet I am going to do a series of popularization of chip workplace in the near future, and will invite engineers from different positions and technical experts from different fields to do some interviews. In the first phase, I will bring my good buddy, the RF guy next door, to tell you the story of electromagnetic fields and electromagnetic waves, and later on, I may also link up with other UPs in the tech section.

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